qblox_scheduler.backends.qblox.operation_handling.virtual#
Classes for handling operations that are neither pulses nor acquisitions.
Attributes#
Classes#
Defines the behavior for an operation that does not produce any output. |
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Strategy for operation that does not produce any output, but rather applies a |
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Strategy for operation that does not produce any output, but rather resets |
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Strategy for operation that does not produce any output, but rather sets |
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Strategy for compiling a DC voltage offset instruction. The generated Q1ASM contains |
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Strategy for resetting the count of feedback trigger addresses. |
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Strategy for compiling an "update parameters" real-time instruction. |
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Strategy for compiling a "Loop" control flow instruction. |
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Strategy for compiling a "Conditional" control flow instruction. |
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Strategy for compiling "ControlFlowReturn" control flow instruction. |
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Strategy for compiling |
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Strategy for compiling an |
Module Contents#
- class IdleStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
qblox_scheduler.backends.qblox.operation_handling.base.IOperationStrategyDefines the behavior for an operation that does not produce any output.
- Parameters:
operation_info (qblox_scheduler.backends.types.qblox.OpInfo) – The operation info that corresponds to this operation.
- property operation_info: qblox_scheduler.backends.types.qblox.OpInfo[source]#
Property for retrieving the operation info.
- property generates_path_Q_output: bool[source]#
If True, this strategy compiles to instructions that generate output on Q. If False, the instructions either generate no output, or output only on path I.
- generate_data(wf_dict: dict[str, Any]) None[source]#
Returns None as no waveforms are generated in this strategy.
- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Add the assembly instructions for the Q1 sequence processor that corresponds to this operation.
Not an abstractmethod, since it is allowed to use the IdleStrategy directly (e.g. for IdlePulses), but can be overridden in subclass to add some assembly instructions despite not outputting any data.
- Parameters:
qasm_program – The QASMProgram to add the assembly instructions to.
- class NcoPhaseShiftStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for operation that does not produce any output, but rather applies a phase shift to the NCO. Implemented as
set_ph_deltaand anupd_paramof 8 ns, leading to a total duration of 8 ns before the next command can be issued.- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Inserts the instructions needed to shift the NCO phase by a specific amount.
- Parameters:
qasm_program – The QASMProgram to add the assembly instructions to.
- class NcoResetClockPhaseStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for operation that does not produce any output, but rather resets the phase of the NCO.
- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Inserts the instructions needed to reset the NCO phase.
- Parameters:
qasm_program – The QASMProgram to add the assembly instructions to.
- class NcoSetClockFrequencyStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for operation that does not produce any output, but rather sets the frequency of the NCO. Implemented as
set_freqand anupd_paramof 4 ns, leading to a total duration of 4 ns before the next command can be issued.- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Inserts the instructions needed to set the NCO frequency.
- Parameters:
qasm_program – The QASMProgram to add the assembly instructions to.
- class AwgOffsetStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for compiling a DC voltage offset instruction. The generated Q1ASM contains only the
set_awg_offsinstruction and noupd_paraminstruction.- property generates_path_Q_output: bool[source]#
If True, this strategy compiles to instructions that generate output on Q. If False, the instructions either generate no output, or output only on path I.
- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Add the Q1ASM instruction for a DC voltage offset.
- Parameters:
qasm_program (QASMProgram) – The QASMProgram to add the assembly instructions to.
- class ResetFeedbackTriggersStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for resetting the count of feedback trigger addresses.
- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Add the assembly instructions for the Q1 sequence processor that corresponds to this pulse.
- Parameters:
qasm_program – The QASMProgram to add the assembly instructions to.
- class UpdateParameterStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for compiling an “update parameters” real-time instruction.
- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Add the
upd_paramassembly instruction for the Q1 sequence processor.- Parameters:
qasm_program (QASMProgram) – The QASMProgram to add the assembly instructions to.
- class LoopStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for compiling a “Loop” control flow instruction.
Empty as it is used for isinstance.
- class ConditionalStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo, trigger_condition: qblox_scheduler.backends.qblox.conditional.FeedbackTriggerCondition)[source]#
Bases:
IdleStrategyStrategy for compiling a “Conditional” control flow instruction.
- class ControlFlowReturnStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for compiling “ControlFlowReturn” control flow instruction.
Empty as it is used for isinstance.
- class TimestampStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for compiling
Timestamp.- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Inserts the instructions needed insert a time reference.
- Parameters:
qasm_program – The QASMProgram to add the assembly instructions to.
- class AssignStrategy(operation_info: qblox_scheduler.backends.types.qblox.OpInfo)[source]#
Bases:
IdleStrategyStrategy for compiling an
Assignstatement into backend register instructions.Complex expressions are compiled recursively: each sub-expression is evaluated into a temporary register that is freed as soon as it is consumed, keeping register pressure at O(expression depth) rather than O(expression size).
*(constant times runtime value only) requires a target withQASMISACapabilities.multiplication(Q1 ISA version >= 2.0, cluster firmware >= 1.1) and raisesNotImplementedErrorotherwise; see_compile_multiplication()for the fixed-point details./and//are always unsupported, since Q1ASM has no divide instruction.- insert_qasm(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram) None[source]#
Add register related assembly instruction for the Q1 sequence processor.
- Parameters:
qasm_program (QASMProgram) – The QASMProgram to add the assembly instructions to.
- _compile_into(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram, expr: qblox_scheduler.operations.expressions.Expression | int | float, dtype: qblox_scheduler.operations.expressions.DType, destination_register: str) None[source]#
Compile expr and store the result directly into destination_register.
- _compile_multiplication(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram, expr: qblox_scheduler.operations.expressions.BinaryExpression, dtype: qblox_scheduler.operations.expressions.DType, dst_reg: str) None[source]#
Compile
constant * expr(orexpr * constant) into dst_reg.The runtime operand stays in its dtype’s fixed-point representation; the
constantis represented asc_fixed = round(constant * 2**k)which is a dimensionless scale factor, encoded here ask-bit integer withkas large as possible (at most 31). The full 64-bit productoperand * c_fixedis assembled frommuls32h(higher 32 bits) andmuls32l(lower 32 bits) and then shifted right bykto restore the constant’s fixed-point scale (2**k).
- _get_operand(qasm_program: qblox_scheduler.backends.qblox.qasm_program.QASMProgram, expr: qblox_scheduler.operations.expressions.Expression | int | float, dtype: qblox_scheduler.operations.expressions.DType) collections.abc.Iterator[str | int][source]#
Yield a register or immediate for expr, freeing any temp register on exit.